Implementation of Carrier Frequency Offset and Iq Imbalance Compensation in Ofdm Systems

This work presents a low-complexity architecture compensating for carrier frequency offset (CFO) and IQ imbalance circuits in OFDM receiver systems. A coordinate rotation digital computer (CORDIC) based sinusoid iteration generator (CSIG) is also developed for CFO estimation and correction in wireless local area network (WLAN) communications. Besides the main effect from the multi-path, some non-ideal effects from imperfect hardware design should also be considered such as the IQ imbalance from direct conversion in RF front-end. The improved low-complexity time-domain compensation algorithm is adopted to replace the traditional high-order equalizer. The integrated CFO and IQ compensation circuits reduce 15.7% of area by using hardware sharing. The proposed architecture with high precision is simulated and implemented by TSMC 0.18um CMOS technology. The design occupies about 133k equivalent gate count and 1.339mm core area.